Digital Design Engineer
- Primarily responsible for Image Signal Processing (ISP) system level integration
- Integrate and validate ISP data pipes according to PRD/design specification & system architecture of SoC CIS products
- Work with CIS project lead, sensor digital & analog engineers for system integration & validation
- Work with algorithm and application engineers for image tuning and qualification
- Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation
- Silicon validation, debugging & tuning
- MSEE or BSEE + 2yrs, related field or equivalent work experience.
- Experience in image or video signal processing
- In depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT, etc.
- C++/SystemC knowledge with HLS experience is a plus.
- Experience in design verification and modeling using SVA, SystemC, Python, and Perl.
- Knowledge of CMOS Image Sensor and image signal processing (ISP) is highly desirable.