Senior Digital IC Design Engineer
Description
For our digital design engineering team located in Biel/Bienne, Switzerland, Power Integrations is currently recruiting for a Senior Digital IC Design Engineer. The position reports to the Senior Digital Design Manager based in UK
Position type: Full time 100%
Contract type: Permanent
About Power Integrations
Power Integrations, Inc., is a Silicon Valley-based supplier of high-performance electronic components used in high-voltage power-conversion systems. Our integrated circuits and diodes enable compact, energy-efficient AC-DC power supplies for a huge range of electronic products including mobile devices, TVs, PCs, appliances, smart utility meters and LED lights. Our SCALE™ IGBT drivers enhance the efficiency, reliability and cost of high- power applications such as industrial motor drives, solar and wind energy systems, electric vehicles and high-voltage DC transmission.
Objective of the role
Based in our Biel office you will work closely with colleagues in both the IC Design and Product Definition teams to provide solutions required for the digital elements of the mixed signal products developed by Power Integrations.
This will include solutions which satisfy test and manufacturing requirements. In addition, you will work in developing behavioural models to help accelerate simulation or form part of system emulation.
Responsibilities
- Development of functional digital blocks and contribution to complete mixed signal ASICs from definition to full production maturity.
- Support the Product Definition team with feasibility study, product architecture definition and digital blocks design for FPGA emulation
- Complete RTL design in SystemVerilog of digital functions to meet all specification requirements.
- Create suitable block-level test benches for comprehensive verification of all digital blocks.
- Create suitable behavioural models and top-level test benches for comprehensive verification and regression of all system-level functions and production test functions.
- Complete digital synthesis with suitable physical constraints to meet all PPA requirements.
- Define and implement DFT architecture. Perform scan insertion, ATPG and insert test points to achieve the required test coverage.
- Define digital layout floorplan, oversee digital place-and-route, and ensure post-layout timing closure.
- Generate all necessary design documentation and participate in design reviews.
- Contribute to all product-level verification and validation plans.
- Support silicon evaluation and all product validation activities working with Product, Quality and Test Engineering up to production ramp-up
- Contribute to Technology Process and Design Methodology improvements.
Education and Experience
- MSc/MEng or PhD in Electronics Engineering or related subject
- Minimum 5 years experience in digital IC design using standard cell libraries.
- Deep knowledge and understanding of best-practice digital design methods.
- Familiar executing designs via a fully synthesised digital design flow with RTL and logic synthesis
- Fully conversant with the SystemVerilog standard and scripting languages such as TCL.
- Familiar with the use of constraints and the automatic place-and-route flow for physical design.
- Understanding the importance of production test and having experience of design methods to maximize test coverage such as scan.
- Experience of design techniques for optimising digital power consumption.
- Experience of debugging digital functions in a lab using suitable test equipment (e.g. mixed-signal oscilloscopes).
- Experience in producing accurate and complete documentation.