Lead Design Verification Engineer

EngineeringHybrid Remote, Cupertino, California


Description

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture.  Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center.

The company is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the hottest Semiconductor startups in the industry.

Lead Design Verification Engineer:

We are seeking an experienced verification engineer to lead verification efforts of complex IP subsystems based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with exceptional leadership skills.

Responsibilities:

  • Lead end-to-end verification of complex IP subsystems partnering with architecture and design teams
  • Develop verification infrastructure components including test-benches, scoreboards, and stimulus generators
  • Develop and execute comprehensive verification plans for units and features
  • Implement functional coverage models
  • Debug designs in simulation, prototyping platforms, and silicon
  • Continuously drive methodology improvements to improve efficiency
  • Mentor junior engineers to build a high performing team

Minimum Qualifications:

  • BS+8 years or MS+6 years of industry experience successfully delivering complex IP subsystems

Skills & Qualifications Required:

  • SystemVerilog verification development experience
  • Testbench construction using UVM or analogous methodologies
  • Scoreboards and stimulus generators for complex units
  • Strong background in industry standards and protocols such as PCIe, Ethernet, CXL, AMBA AXI etc., 
  • Unit or feature ownership throughout the project lifecycle
  • Demonstrated team leadership experience with outstanding communication skills
  • Highly motivated self-starter with strong execution mindset and collaborative approach
  • Post-silicon debug experience strongly preferred

EEOE

Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.

COVID-19

Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.

NOTICE: External Recruiters/ Staffing Agencies:

Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.

Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.



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