Staff System-On-Chip Modeling Engineer
Description
- Model new image sensor technology System-on-Chip solutions using Python/SystemC/VerilogA. Responsible for model development of analog and mixed-signal pixel circuitry and readout circuitry in order to enable efficient system emulation suitable to generate e.g. training data for early algorithm development.
- Conduct design verification and modeling using SVA, Python, Perl, C++ and HLS.
- Validate and match system level models against circuit simulations and real world performance and draw conclusions.
- Engage closely with cross-functional teams to establish and validate important system parameters and their trade-offs.
- Work with sensor digital and analog engineers for system design, integration and validation.
- Work with algorithm engineers for module level design.
- Work with algorithm and application engineers for image tuning and qualification.
- Define system specifications and analyze failure modes.
- Identify potential solutions to overcome circuit/device limitations at early R&D stage.
- Assist in product planning by careful balance of schedule, resources and key specifications.
- Conduct silicon validation, debugging and tuning.
Requirements:
Master’s degree in Electrical Engineering, Computer Engineering, Applied Physics or related fields plus three (3) years of experience in CMOS image sensors related engineering occupations.
Required experience:
- Experience in a device (solid-state physics) for transistors and memory (SRAM, DRAM, Emerging memories).
- Experience in CMOS image sensors, camera systems, image signal processing, and/or digital signal processing or related fields.
- Experience in using Cadence/Virtuoso in the context of SPICE/Spectre circuit simulations.
- Experience in Python Experience in VerilogA.
- Familiarity with C/C++ in an object-oriented context.
- Experience in optical simulation.
- Mechanical simulation for packages.
- Experience in hands-on device characterization and analysis.
- Experience with AI-related accelerators, display technology, and MEMS sensor technology.
- Working experience with process integration engineers for module-level design.
- Working experience closely with a digital architecture engineer for the module-level design of a neural processing unit.
- Project management experience to collaborate with external partners.
Annual base salary for this role in California, US is expected to be between $178,006 - $180,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.