Sr. Digital Design Engineer

ENGINEERING Oslo, Norway

Apply

Description

A cover letter outlining your motivation to move to Oslo, Norway is required with submittal of your CV.  

We design and verify: timing and control signals for CMOS pixel array readout & analog/digital converters; image signal processing (ISP) functions such as black level compensation (BLC), defect pixel correction (DPC), lens correction, and high dynamic range processing; serial and parallel I/O interfaces (e.g. I2C, MIPI) for use in OMNIVISIONS’s Image Sensors. As the designs are targeted for the automotive market, there is also focus on design for safety. The team handles all tasks of the chip development cycle including product specification, architecture definition, RTL design, verification, synthesis, DFT, STA, gate-level-simulation, power analysis & optimization, FPGA emulation, chip bring-up, validation & debug.

As a Senior Digital Design Engineer you will be working on the design and development of advanced CMOS Image Sensors (CIS). We are looking for someone with strong digital design expertise who is able to handle various aspects of the design flow from specification to tape-out. In this role you’ll have the opportunity to grow into a technical project leader taking on more responsibility. This position calls for someone who is highly motivated, self-driven, a team player and willing to learn.

Responsibilities

  • Design and verification of digital IP for CIS
  • Define chip level architecture taking into consideration power, performance & area trade-offs; build module specification
  • Perform logic synthesis, work with backend team for floor planning, STA and DFT
  • Participate in project planning and progress tracking
  • Full-chip integration and verification
  • Silicon bring-up, validation and debug

Qualifications

  • Minimum MSEE + at least 4 yrs. OR BSEE + at least 6 years of digital design experience
  • Expertise in ASIC design flow: RTL coding, simulation, logic synthesis, STA & DFT.
  • Knowledge of all aspects of chip development cycle from design specification, architecture definition, low-power design, tape-out, chip validation and debug
  • Knowledge of assertion-based formal verification is a plus
  • Knowledge of ASIL is a plus
  • Image processing/DSP knowledge is a plus
  • Excellent command of English as a working language
  • Ability to work collaboratively with people across multiple functional areas

Apply Apply Later
← Back to Current Openings

Share