Sr. Analog Layout Design Engineer
Description
A cover letter outlining your motivation to move to Oslo, Norway is required with submittal of your CV.
The Analog Layout Design Engineer will be joining our team, developing market leading image sensor solutions for automotive segment. In a rapidly developing industry, you will do chip and block level layout, as well as chip level integration, performing all necessary verification of our state of the art image sensors.
Responsibilities:
- Carry out block level and chip level full custom analog layout and chip level integration to ensure timely completion of ASIC.
- Work with design engineers on chip architectural designs, floor planning and pad frame decisions.
- Physical verification using Calibre.
- Do some block level design and support verification by carrying out simulations when needed
Requirements:
- Minimum BSEE with at least 6 years of experience in analog layout or a MSEE with at least 4 years of experience in analog layout
- Good understanding of CMOS fabrication processes
- Extensive experience with Cadence Virtuoso
- Experience with Calibre DRC/LVS
- Experience with design and simulation of CMOS circuits
- Excellent command of English as a working language.