VLSI Engineering London, United Kingdom


We are looking for a candidate to join our next generation Systems on a Chip (SOC) RTL design team. The candidate will be a part of the SoC design team responsible for specifying and implementing uncore RTL blocks into our custom high performance, energy efficient AI processor.


- Own or assist in the development of key modules in uncore blocks like NoC, debug or D2D communications.
- Perform performance studies, including area and power estimation.
- Write microarchitecture specifications
- Work with design verification team to draft test plans, debug test failures and to ensure functional correctness
- Synthesize RTL to logic gates using standard CAD tools and build timing and area constraints
- Interact closely with physical design team to guarantee proper backend implementation
- Support Silicon bringup and diagnostics
- Support simulation and emulation infrastructure


- BS/MS in CS/EE or related technical field
- +5 years in ASIC/SOC design and Verilog RTL coding experience
- Completed ASIC/SOC design projects with successful tapeouts

Additional valuable experience

- Knowledge of logic design principles along with timing and power implications
- Experience in die to die communication, in high speed SERDES or similar
- Experience in industrial standard ASIC/SOC CAD tools for simulation, synthesis, debug, timing analysis and power estimation
- Experience in deadlock and livelock analysis
- Excellent verbal and written communication skills
- Experience in Python and/or bash scripts