Sr. Staff/Principal SoC/Full-chip PDN-EM-IR-ESD (AI2100)

Engineering - Hardware Bengaluru, India


Description

Description

Areas of Focus and Key Responsibilities

  • Develop the flow, scripts & perform various electrical analyses at block and top levels, including static/dynamic IR, power/signal EM, in-rush-current/powerup analysis and ESD.
  • Drive block and top-level electrical verification closure
  • Develop static/dynamic IR, power/signal EM, ESD and power grid specs based on power/performance/area targets of different SOC blocks. 
  • Implement power grids in industry standard PnR tool environments, preferably in ICC2 and/or Fusion Compiler.
  • Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks.
  • Work closely with the Package and/or Power Integrity teams to optimize the overall PDN performance.

Minimum Requirements

  • BSEE or MSEE with at least 15+ years of experience on high complexity SoC designs preferably 7nm or lower technology nodes.
  • In-depth knowledge of EMIR tools such as Redhawk.
  • Experience in developing and implementing power grid
  • Good knowledge of system-level PDN and power integrity
  • Working knowledge of PnR implementation, verification, power analysis and STA
  • Proficient in scripting languages (TCL/Perl/Python)
  • Experience with industry standard EMIR tools such as Redhawk.
  • Must possess good communication skills, be a self-driven individual and a good team player.