Staff CAD Engineer

Software Engineering Hyderabad, Telangana


Description

Senior CAD-IP Engineer

Hyderabad, India

We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives. silabs.com

 Job Summary:

Silicon Labs is looking for a Senior CAD engineer to provide 3rd party and external Intellectual Property (IP) support to our design teams. The successful senior engineer will play the role of an IP Architect, who will set up flows to evaluate, install, verify, and deliver IP from 3rd party suppliers. He or she will obtain requirements (e.g. characteristics of memory compiler, standard cells, etc. required for a specific project) from design teams and identify appropriate IP suppliers. He or she serves as a bridge between the IP vendor and Silicon Labs. A further critical responsibility includes experience or good familiarity with the design (circuit and layout) and characterization (for *.libs) of internal standard cell libraries.

 This position requires the ability to analyze designer needs and suggest appropriate solutions, so a candidate should be a quick learner and self-driven. Also required is the ability to prioritize and accomplish the most important objectives of the organization on a committed schedule, both individually and working with others. The candidate will be expected to develop robust automation techniques and documentation to speed up installation and QA processes. Successful candidates will have excellent written and oral communication skills and will be comfortable explaining technical concepts to a wide range of audiences including more senior engineers.

 Education and Experience:

  • BSEE (or equivalent) plus 6 years of related professional experience
  • MSEE (or equivalent) plus 4 years of related experience preferred

 Requirements:

  • Relevant experience with foundation, functional or CPU core IP is a must
  • Proven track-record showing support for various design teams is a must
  • Strong knowledge of electrical engineering fundamentals
  • Solid knowledge in scripting using PERL, Makefile, TCL and any other scripting languages
  • Intimate familiarity of Analog (e.g. Spectre) and Digital (e.g. Incisiv) Simulation and Verification tools
  • Intimate familiarity or knowledge of Cadence Virtuoso tools (e.g. schematic, layout)
  • Intimate familiarity of Physical Verification concepts (DRC, LVS, etc.)
  • Excellent written and verbal communication skills
  • Familiarity with Analog and Digital Design concepts
  • Familiarity or knowledge of Verilog, System Verilog, VHDL is a plus
  • Familiarity with Cadence Digital P&R tools (Genus, Innovus) is a plus
We are an equal opportunity employer and value diversity at our company.  We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.