Associate Staff -SoC Verification Engineer(hot job)
About Silicon Labs:
We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.
We are now looking for high passionate leader to work in our verification team. As a staff/sr staff you will be leading a team of verification engineers by applying talent development and people management skills to create a motivated high-performance team with quality first approach for pre-silicon Verification, SOC verification.
- Leading, managing, and developing a team of verification Engineers by applying talent development and people management skills to create a motivated high-performance team.
- Being a technical expert in overseeing a team that specializes in state-of-the-art simulation and verification techniques.
- Reviewing and creating test plans Full-chip functional verification and Test Bench Development in System Verilog (UVM) targeting complete functionality coverage
- Finding cost-effective and innovative verification and automation techniques and driving the team to implement them on new devices.
- Should be able to come up with test plans along with estimates and risks
- Understanding of the processor architecture is must
- Masters/ Bachelors in EE/EC/CS with 10+ years of experience in IP/SoC/ASIC Verification.
- Should have experience in managing the team
- Leadership skills demonstrated as a part of the team
- Experience with Processor based SoC verification
- Familiarity with advanced low power techniques and tools such as UPF, CLP and power aware verification
- Strong SV/UVM fundamentals, Experience of building Testbenches from scratch.
- Experience developing assertion based verification and functional coverage
What to we do specially in Silabs:
- Architect and develop verification environment and testbench components.
- Develop comprehensive test plan and implement test cases. Verify design in unit level /SoC level environment using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.
- Write functional cover groups and cover points for coverage closure. Perform RTL code coverage, assertion coverage, functional coverage and gate level simulations. Drive and adopt new verification methodologies and flows for efficiency improvements.
Individual responsibility will include
- DV ownership of one or more features in the 22nm Based SoC Design Verification. This includes various testbenches developments/debug at block/subsystem/chip level
- Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements.
- Ensure a bug free silicon for Tape Out’s
- Able to guide junior members and provide debug support
Benefits & Perks
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
- Equity Rewards (RSUs)
- Insurance plans
- PF and NPS
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability.