Staff CAD Engineer - PDK Developer

Software Engineering Hyderabad, Telangana


Description

Staff CAD Engineer 

Hyderabad, India

We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives. silabs.com  

Job summary

As a senior member of our CAD team, you will develop, maintain, enhance PDK Infrastructure and debug Physical Verification decks and design flows for our rapidly growing IoT, Timing, and Power product divisions. This is a high visibility role, which requires fluid interaction with Silicon Labs’ foundry, CAD, Design, Packaging, and Layout teams. The candidate should have excellent grasp of PDK Development, DRC, LVS runsets, DFM rules, SVRF, and TVF syntax. Proven experience working across a range of process nodes including smaller geometries (22nm and below) is important for the role.  

 

Education and Experience

MSEE (or equivalent) and 10 years of industry experience

Key Qualifications

  • Ideal candidate should have 8+ years of experience in Physical Verification, preferably writing from scratch and/or modifying existing DRC, LVS, ERC and Dummy fill decks using industry standard tools like Mentor Calibre
  • Strong debug experience reviewing LVS and DRC errors
  • Strong programming skills in SKILL, Perl, Python, Tcl and Shell scripting and experience in stitching together PV flows
  • Experience with Cadence Virtuoso layout editor, Calibre RVE, DRV etc
  • Experience with Layout Parasitic Extraction (LPE) tools like Cadence QRC or Star-RCXT
  • Experience with Mentor PERC (Programmable Electrical Rule Checker) for Current Density and latchup checks is a definite plus
  • Ability to work independently, drive decision-making, strong communication, and documentation skills are critical
  • Familiarity with Analog and Digital design engineering concepts
  • Excellent documentation and communication skills. Familiarity with Jira and Confluence is a plus
  • Conduct impact analysis meetings with key stakeholders
  • Familiarity with leading version control tools like Perforce, Cliosoft, Methodics will be a plus
  • Familiarity working with foundry teams both internal and external to seek clarification, submit testcases and provide solutions to design and layout engineers

Benefits & Perks

  • Equity Rewards (RSUs)
  • Insurance plans
  • PF NPS
  • WFH Options

 

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.