Senior Digital Verification Engineer

Hardware Engineering Tai Seng, Singapore


We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.

The role

You will be an individual technical contributor as part of a digital design team developing highly integrated mixed signal SoC’s for the low power IoT products (MCU and Wireless).

How the IoT Design Team Works

The Silicon Labs IoT design team is responsible for the development of wireless SoC’s to enable industry leading solutions for the Internet of Things market.  We focus on ultra-low power solutions for wireless connectivity, such as Bluetooth Low Energy (BLE), Zigbee, ZWAVE, WiFi, and propriety systems.  These complex wireless SoC’s require a multi-disciplined IC design team working in close collaboration to achieve the lowest power and most cost-effective solutions.  The IoT Design team is comprised of the brightest and most innovative engineers in the semiconductor industry, spanning multiple disciplines: RF, Modem, Analog, and Digital.  The Digital Design team is organized along three major functions: Design, Verification, and Implementation.

Your Job Scope:

Block and IP Verification
    • Verify IP blocks to validate performance and adherence to requirements in  a reusable manner
    • Generate and execute verification plan
    • Determine and use of verification approach, such as directed, random, and assertion based methods
    • Coverage analysis
    • Define and implement random configurable verification models
    • Verification of mixed-signal and RF IP integration, including real-value modeling
SoC Integration and Verification
    • Integration of digital blocks/IP into the SoC infrastructure
    • Develop tests and testbenches for SoC integration with heavy emphasis on reuse
    • Gate simulations
    • C test development
Flows and Methodology
    • Improve flows and methodologies to streamline development and integration of IPs. 

Preferred experience and skills:

  • MS in Electrical Engineering, or equivalent
  • At least four years of design and/or design verification experience.
  • Strong knowledge of engineering fundamentals
  • Knowledge of System-On-Chip or ASIC design, and understanding of SoC or ASIC tools/flows
  • Design/Verification skills
    • System Verilog, UVM
    • RTL Coding
    • System/IP modeling (Matlab, C, AMS)
    • Software/Firmware coding
    • Low-power implementation and verification (UPF, CPF)
    • System Verilog assertion and coverage analysis
  • Knowledge of scripting language (python, perl, shell, tcl)
  • Excellent written and verbal communication skills
  • Mentor junior engineers in UVM and verification fundamentals

Exciting?  Come talk with us!

We are an equal opportunity employer and value diversity at our company.  We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.