RF/SerDes Digital Design Engineer

Engineering - Hardware San Jose, California


Description

Position at Samsung Semiconductor, Inc.

RF/SerDes Digital Design Engineer
Location:  San Jose

Overview:

Samsung SoC R&D Lab in San Jose is seeking a talented, highly motivated individual to join our team as RF digital design engineer. Candidate will work as part of a team on digital and mixed-signal circuits for wireless communication systems.

 

 Responsibilities 

  • Creating PHY layer architecture/microarchitecture and design for new features, including custom DSP, FSM and high speed datapath.
  • Working with RF/Analog design engineers during development, bring-up, and commercialization.
  • Running full front-end flow: RTL, verification, waveform debug, lint, CDC, STA, formal verification, ECO, synthesis.
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REQUIRED SKILLS

  • BS or BE minimum, MS preferred
  • Deep understanding of digital VLSI design and implementation flow
  • Experience with C, Verilog or System Verilog
  • Experience with digital verification, waveform debug, lint, synthesis
  • Teamwork, dedication, strong communications and interpersonal skills
  • Excellent communication skills both written and verbal

 

PREFERRED SKILLS

  • Design experience of RF digital controller or high speed interface as PCIE/SATA/DDR4
  • Experience with RNM/AMS/DMS is a plus

 #LI-MG1