Junior IC Layout Designer

IC Design Engineering San Jose, California

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Description

Responsibilities

The IC Layout Designer will work with IC Design Engineers in 4 design sites including USA, Canada, UK, and Switzerland to implement circuit schematics in physical layout. This role will work with Technology Engineers to implement circuit components such as transistors, resistors, capacitors, etc., as well as test structures in physical layout. In addition, this individual will verify completed physical layout using CAD tools such as Cadence Layout and Schematic editor and Mentor Calibre DRC and LVS. Carry out all necessary tasks in preparing and taping out verified layout database to mask shop.

Requirements

  • AA degree or higher education preferred
  • IC layout certification required
  • IC layout experience preferably in analog or mixed mode IC layout design 

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