Digital Design Engineer

ENGINEERING Santa Clara, California


Position Overview:

In this position, the candidate will participate in the leading edge CMOS image sensor design.


  • Design and verify digital ASIC IP for imaging signal processing
  • Conduct logic synthesis and timing analysis
  • Provide power estimation and optimization
  • Perform chip bring-up, validation and debugging
  • Design verification using FPGA platforms
  • Build scripts and software to help verification and understanding C/C++ codes
  • Write technical document and design support for entire product cycle


  • Minimum 1-2 years work experiences in related field
  • Experience in digital signal process, image signal processing
  • Experience in ASIC design, including Verilog RTL/System Verilog coding/verification, logic synthesis
  • Knowledge of timing analysis and power analysis, understanding of verification methodology, such as, UVM/OVM
  • Experience with Perl/Python programming under Linux, and C/C++ programming
  • Excellent communication and leadership skills
  • Education: Minimum MSEE or equivalent required