SR. DESIGN VERIFICATION ENGINEER
Description
Esperanto Technologies produces best-in-class Systems-On-Chip (SoCs) for Artificial Intelligence (AI) and High-Performance Computing (HPC) based on RISC-V architecture. We are featured in EE Times Silicon 100 “Startups Worth Watching in 2023”. Our solutions leverage specific circuits and architectural techniques, in addition to the latest VLSI process nodes, to save significant amounts of energy while executing AI and HPC applications.
Role:
Esperanto Technologies is looking for motivated, talented, and experienced engineers to join our verification team dealing with design verification of our I/O unit, comprising different I/O and mission critical blocks. The position includes development of verification environment enhancements, definition and execution of test plans. Within this role, you will be a part of an experienced team who has been working on three generations of the product, with a potential to advance to a leading position.
Requirements:
- 4+ years of verification experience
- Advanced knowledge of verification flows
- Clear understanding of constrained random verification process, functional coverage, code coverage, and assertion methodology and philosophy
- Expertise in verification languages such as SystemVerilog, UVM
- Expertise in C or C++ programming languages is a plus
- Knowledge of CPU and SOC architectures is a plus
- Prior experience with RISC-V is a plus
- Experience with industry standard IPs like I2C, UART, DMA, Timers, SPI/QSPI, eFuse, Root-Of-Trust, but not limited to
- Experience with Python, Shell scripting and Makefiles is an advantage
- Degree in electrical engineering or computer science, or equivalent experience.
- Employment Type: Hybrid (office + remote)