FPGA Engineer (4578)
The Central Development Laboratory (CDL) at the National Radio Astronomy Observatory (NRAO) is currently hiring an experienced Embedded FPGA design engineer to work on its digital design team. CDL’s digital design team works on cutting-edge projects that provide the critical technology and expertise enabling the next generation of radio astronomy instrumentation. The ideal candidate will be highly proficient in hardware and software design, implementation, simulation, and verification of embedded processor-based FPGA SOC designs. This position offers an active role in the design of future instrumentation that will reveal the hidden universe such as gravitational waves, the origins or galaxies, the origins of star and planet formation, and black holes.
The selectee will report to the Digital Design Team manager. CDL’s digital design team works cooperatively with other design groups in CDL and across NRAO and other international observatories, so the ideal candidates will be able to effectively research and solve complex technical issues and work with minimal supervision. Because the team often juggles several projects at once, excellent time management skills and ability to multi-task are a must. Strong oral and written communications skills and the ability to document and explain one’s work are also important. A central function of the position relates to the hardware and firmware development of embedded processing sub-systems. Proficiency with the Zynq UltraScale+ MPSoC processing system architecture is mandatory. Experience with Board Support Packages (BSP), embedded Linux OS, embedded Linux driver development, Xilinx SDK, and bare metal development are essential.
This position will be based at the Central Development Lab (CDL) of the NRAO which is located in Charlottesville, VA. The CDL has a long history of developing new technology to enable forefront research in radio astronomy. Current research and development programs include cryogenic, low-noise front-ends, wideband electromagnetic components such as antenna feeds and polarizers operating from below 1 GHz to nearly 1 THz, phased-array feeds, highly integrated receiver architectures that employ early signal digitization and novel encoding, wideband and scalable digital signal processing architectures, and photonic signal generation, time reference distribution, and data transmission.
Note: This position is eligible for remote work status for well-qualified candidates. Because of necessary lab work and team meetings, the selectee will be required to periodically travel to CDL’s facilities in Charlottesville, Virginia for meetings and hardware/software integration activities.
In addition to competitive pay, we provide excellent paid time off benefits (vacation and sick leave). Medical, dental and vision plans are effective on the first day of employment. Our retirement benefit contributes an amount equal to 10 percent of a qualified participant’s base pay. No contribution is required of the employee; we also offer an optional supplemental, tax-deferred plan for employee retirement contributions.
Bachelor’s degree in electrical engineering.
One to two years related experience and/or training; or an equivalent combination of education and experience. Candidates with progressively more responsible experience will be considered for a higher-level position ranking.
- Experience with Xilinx Zynq UltraScale+ MPSoC Design and SDK
- Experience with Embedded Linux OS (PetaLinux) and Driver Development
Due to export control purposes, this position is open only to US persons which include United States citizens and permanent residents.
- One or more years FPGA development experience
- Highly proficient in HDL (Verilog preferred) and embedded C Programming
- Solid understanding of Xilinx FPGA Development tools (Vivado/SDK)
- Solid understanding of Xilinx Zynq UltraScale+ MPSoC hardware architecture
- Solid understanding of embedded Linux OS and tools (PetaLinux)
- Solid understanding of embedded Linux driver development
- Detailed understanding of architectural elements within a Xilinx FPGA
- Bare metal processing system development
Occasional travel may be required.
- Familiarity with Digital Signal Processing concepts and applications
- Experience designing embedded processor sub-systems
- Experience designing high-speed communication protocols (100GbE/400GbE)
- Interface standards such as USB, SPI, I2C, DDR4, and AXI-4
- Experience with PetaLinux Configuration and Boot Loader
- Familiarity with revision control concepts and tools (e.g. GitHub/GitLab)
Apply online at the NRAO Careers page (http://jobs.jobvite.com/nrao/jobs). You will need to be prepared to upload your current resume and a letter of application describing interest and suitability for the position.
Applicants must be currently authorized to work in the United States on a full-time basis; this position requires US Citizenship or Permanent Residency.
Equal Opportunity Employer Statement:
AUI is an equal opportunity employer. Women, Minorities, Vietnam-Era Veterans, Disabled Veterans, Veterans and Individuals with Disabilities are encouraged to apply. To view our complete statement, please visit http://jobs.jobvite.com/nrao/jobs. If you require reasonable accommodation for any part of the application or hiring process due to a disability, you may submit your request by sending an email to [email protected]
The National Radio Astronomy Observatory is a facility of the National Science Foundation operated under cooperative agreement by Associated Universities, Inc.