Digital Design Engineer (Engineer III-IV)

Engineers, Technical Specialists and Technicians Charlottesville, Virginia


Description

Position Description:

Position Summary

The Central Development Laboratory (CDL) at the National Radio Astronomy Observatory (NRAO) is seeking to recruit an experienced digital design engineer with applicable FPGA SOC design experience to work on its correlator/digital design team. CDL’s digital design team works on a number of cutting-edge projects that provide the critical technology and expertise needed to build the next generation of radio astronomy instrumentation. The ideal candidate is highly proficient in Verilog/System Verilog, has a solid understanding of Xilinx FPGA Development Tools (Vivado/SDK), and a firm grasp of Synopsys Design Constraints.

 

Due to export control purposes, this position is open only to US persons which includes: United States citizens and permanent residents.

 

The selectee will report to the Digital Design Team manager. CDL’s digital design team works cooperatively with other design groups in CDL and across NRAO and other international observatories, so the ideal candidate will be able to effectively research and solve complex technical issues and work with minimal supervision. Because the team often juggles several projects at once, excellent time management skills and ability to multi-task area a must. Strong oral and written communications skills and the ability to document and present one’s work are also important. Because this position will be hardware development centric, an ability to read and understand datasheets and schematics is important as well as an understanding of digital hardware at the component level and experience with standard lab tools (oscilloscope, logic analyzer, etc.) and firmware/hardware debugging techniques.

 

The position will be based at the NRAO Central Development Laboratory in Charlottesville, VA. The CDL has a long history of developing new technology to enable forefront research in radio astronomy. Current projects include an update to the correlator for the interferometric telescope at the Atacama Large Millimeter Array (ALMA) in Chile, planning a new correlator for the next-generation Very Large Array (ngVLA), and engineering new digital receiver architectures with patented NRAO technology to digitize signals as far up the receiver chain as possible. A number of other projects for NRAO partner organizations are also active.

 

In addition to competitive pay, we provide excellent paid time off benefits (vacation and sick leave).  Medical, dental and vision plans are effective on the first day of employment.  Our retirement benefit contributes an amount equal to 10 percent of a qualified participant’s base pay. No contribution is required of the employee; we also offer an optional supplemental, tax-deferred plan for employee retirement contributions.

 

Position Requirements:

Minimum Education

Bachelor’s degree in electrical engineering.

 

Minimum Experience

A minimum of 3 years’ experience in a related field. Candidates with progressively more responsible experience will be considered for a higher-level position ranking.

 

Required Experience

  • 3+ years of applicable FPGA SOC design experience
  • Highly proficient in Verilog/System Verilog
  • Firm grasp of Synopsys Design Constraints
  • Solid understanding of static timing analysis and the process by which timing closure is achieved in a design
  • Solid understanding of Xilinx FPGA Development Tools (Vivado/SDK)
  • Solid understanding of basic digital design concepts (understand how Verilog code translates into logic primitives with a Xilinx FPGA)
  • Detailed understanding of the architectural elements within a Xilinx FPGA
  • Ability to recognize and clearly report information relevant to a sound FPGA design
  • Familiarity with Digital Signal Processing concepts and applications
  • Experience designing high-speed memory interfaces (DDRx)
  • Experience designing high-speed transceiver protocols (Ethernet, PCI Express)
  • Experience designing interface standards such as USB, SPI, and I2C
  • Scripting in TCL, Python
  • Familiarity with revision control concepts and tools (e.g. Subversion)

 

Additional Requirements

Occasional travel may be required.

 

Application Instructions:

 

Select the 'Apply' button below. Applicants are required to submit a CV/Resume and a cover letter describing interest and suitability for the position. Please upload your CV/Resume with the ‘Add Resume’ button and your cover letter with the ‘Additional Files’ button at the beginning of the application process.

 

 

The NRAO is an equal opportunity employer (M/F/D/V)

The National Radio Astronomy Observatory is a facility of the National Science Foundation operated under cooperative agreement by Associated Universities, Inc.